Course Introduction

Lehrplan anzeigen

Kompetenzen, die Sie erwerben

Primality Test, Verilog, Digital Design, Static Timing Analysis


4.6 (1,049 Bewertungen)

  • 5 stars
    72,16 %
  • 4 stars
    20,40 %
  • 3 stars
    4,76 %
  • 2 stars
    1,52 %
  • 1 star
    1,14 %


9. Nov. 2020

This is a very nice course that broadened my knowladge. I will be happy to continue next courses. Each video has need to be watched several times, there are a lot of useful information.


17. Sep. 2018

Very challenging course with tough assignments and quizes to pass with deadlines but i enjoyed this.

I got practical experience in designing, compiling and analyzing FPGA circuits.

Aus der Unterrichtseinheit

What's this programmable logic stuff anyway? History and Architecture

Unterrichtet von

  • Placeholder

    Timothy Scherr

    Senior Instructor and Professor of Engineering Practice

Durchsuchen Sie unseren Katalog

Melden Sie sich kostenlos an und erhalten Sie individuelle Empfehlungen, Aktualisierungen und Angebote.