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Stufe „Anfänger“
Ca. 46 Stunden zum Abschließen
Untertitel: Englisch
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100 % online
Beginnen Sie sofort und lernen Sie in Ihrem eigenen Tempo.
Flexible Fristen
Setzen Sie Fristen gemäß Ihrem Zeitplan zurück.
Stufe „Anfänger“
Ca. 46 Stunden zum Abschließen
Untertitel: Englisch


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Politecnico di Milano

Lehrplan - Was Sie in diesem Kurs lernen werden


Woche 1

6 Stunden zum Abschließen

A Bird's Eye View on Adaptive Computing Systems

6 Stunden zum Abschließen
7 Videos (Gesamt 29 min), 5 Lektüren, 5 Quiz
7 Videos
Reconfiguration in Everyday Life2m
The Needs for Adaptation: an overview4m
FPGA and reconfiguration: a 1st definition5m
Runtime management2m
Programmable System-on-Chip4m
Programmable System-on-Multiple Chip6m
5 Lektüren
Self-Aware Adaptation in FPGA-based Systems [suggested readings]30m
Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores [suggested readings]1h
Reconfigurable computing: a survey of systems and software [suggested readings]2h
ReconOS: An Operating System Approach for Reconfigurable Computing [suggested readings]30m
R3TOS-Based Autonomous Fault-Tolerant Systems [suggested readings]30m
5 praktische Übungen
History of Reconfiguration8m
FPGA and reconfiguration30m
Programmable SoC Vs SoMCs7m
Runtime management30m
6 Stunden zum Abschließen

An introduction to Reconfigurable Computing

6 Stunden zum Abschließen
5 Videos (Gesamt 27 min), 4 Lektüren, 2 Quiz
5 Videos
Reconfigurable Computing: HW vs SW3m
On how to improve the Reconfigurable computing performance via CAD improvements3m
FPGA-Based Reconfigurable Computing3m
System design space exploration and rationale behind partial reconfiguration15m
4 Lektüren
A platform-independent runtime methodology for mapping multiple applications onto FPGAs through resource virtualization [suggested readings]45m
A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture [suggested readings]1h
Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs [suggested readings]1h
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms [suggested readings]1h 30m
2 praktische Übungen
Reconfigurable Computing Module30m

Woche 2

5 Stunden zum Abschließen

Reconfigurable Computing and FPGAs

5 Stunden zum Abschließen
8 Videos (Gesamt 36 min), 3 Lektüren, 2 Quiz
8 Videos
FPGA Basic Block: CLBs and IOBs6m
FPGA Basic Block: Interconnections5m
FPGA Configuration: an overview2m
More Details on How To Configure and FPGA: the bitstream files4m
Bitstream Composition4m
Configuration Registers6m
How to handle the complexity of an FPGA-based system4m
3 Lektüren
Note on the "Resources"1m
Physical design for FPGAs [suggested readings]1h 30m
Multi-Million Gate FPGA Physical Design Challenges [suggested readings]1h 30m
2 praktische Übungen
Getting familiar with FPGAs34m
FPGA configuration and Bitstream30m
2 Stunden zum Abschließen

Examples on how to configure an FPGA

2 Stunden zum Abschließen
6 Videos (Gesamt 42 min)
6 Videos
From the LUT to the CLB configuration example8m
A simplified FPGA and its configuration settings4m
An Example on how to implement a circuit on a simplified FPGA8m
An Example on how to implement a circuit on a simplified FPGA: bitstram generation phase - CLBs5m
An Example on how to implement a circuit on a simplified FPGA: bitstram generation phase - SBs and routing4m
2 praktische Übungen
LUT and CLB30m
Physical design30m

Woche 3

6 Stunden zum Abschließen

An Introduction to Reconfigurations

6 Stunden zum Abschließen
5 Videos (Gesamt 35 min), 2 Lektüren, 2 Quiz
5 Videos
The 5 W's6m
Reconfigurable Computing as an Exstension of HW/SW Codesing5m
A Classification of SoC Reconfigurations8m
A Classification of SoMC Reconfigurations9m
2 Lektüren
Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign [suggested readings]1h
Performance of partial reconfiguration in FPGA systems: A survey and a cost model [suggested readings]3h
2 praktische Übungen
Functionalities and their implementations30m
Module Review30m
6 Stunden zum Abschließen

Towards Partial Dynamic Reconfiguration and Complex FPGA-based systems

6 Stunden zum Abschließen
8 Videos (Gesamt 40 min), 4 Lektüren, 2 Quiz
8 Videos
How to use FPGA Reconfiguration to face area issues5m
How to deal with the Reconfiguration runtime overhead3m
Recurring modules to reuse them to reduce the Reconfiguration time3m
Partial Reconfiguration to reduce the Reconfiguration runtime overhead5m
Runtime management to explore alternative implementations5m
Bitstreams relocation6m
Bitstreams relocation and virtual homogeneity3m
4 Lektüren
Operating system runtime management of partially dynamically reconfigurable embedded systems [suggested readings]1h
Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture [suggested readings]1h
A runtime relocation based workflow for self dynamic reconfigurable systems design [suggested readings]1h
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux [suggested readings]1h 30m
2 praktische Übungen
Reconfigurable System30m
Partial reconfiguration30m

Woche 4

10 Stunden zum Abschließen

Design Flows

10 Stunden zum Abschließen
9 Videos (Gesamt 54 min), 7 Lektüren, 3 Quiz
9 Videos
Partial Reconfiguration Design Flows4m
Xilinx Difference Based Partial Reconfiguration5m
Xilinx Module Based Partial Reconfiguration5m
Xilinx Partial Reconfiguration (PR) Flow5m
Moudle Based vs Partial Reconfiguration Design Flows17m
Rationale behind DRESD and the work done by the Politecnico di Milano3m
From DRESD to CHANGE and ASAP, two new research initiatives from the Politecnico di Milano4m
CAOS: from embedded to heterogeneous distributed FPGA-based computing systems3m
7 Lektüren
Vivado Design Suite Tutorial, Partial Reconfiguration, UG947 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]1h 30m
Vivado Design Suite User Guide, Partial Reconfiguration, UG909 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]3h
Dynamic Reconfigurability in Embedded System Design [suggested readings]30m
A design methodology for dynamic reconfiguration: the Caronte architecture [suggested readings]30m
Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation [suggested readings]45m
Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project [suggested readings]30m
The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems [suggested readings]30m
3 praktische Übungen
Politecnico di Milano Partial Reconfiguration Research Initiatives30m
Design flows30m
6 Stunden zum Abschließen

Closing remarks and future directions

6 Stunden zum Abschließen
1 Video (Gesamt 5 min), 3 Lektüren, 1 Quiz
3 Lektüren
Virtualized Execution Runtime for FPGA Accelerators in the Cloud [suggested readings]1h 45m
A cloud-scale acceleration architecture [suggested readings]2h
Enabling Flexible Network FPGA Clusters in a Heterogeneous Cloud Data Center [suggested readings]1h 30m
1 praktische Übung
Closing remarks and future directions30m



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