Chevron Left
Zurück zu Hardware Description Languages for FPGA Design

Kursteilnehmer-Bewertung und -Feedback für Hardware Description Languages for FPGA Design von University of Colorado Boulder

399 Bewertungen
111 Bewertungen

Über den Kurs

This course can also be taken for academic credit as ECEA 5361, part of CU Boulder’s Master of Science in Electrical Engineering degree. Hardware Description Languages for Logic Design enables students to design circuits using VHDL and Verilog, the most widespread design methods for FPGA Design. It uses natural learning processes to make learning the languages easy. Simple first examples are presented, then language rules and syntax, followed by more complex examples, and then finally use of test bench simulations to verify correctness of the designs. Lecture presentations are reinforced by many programming example problems so that skill in the languages is obtained. After completing this course, each student will have fundamental proficiency in both languages, and more importantly enough knowledge to continue learning and gaining expertise in Verilog and VHDL on their own....


6. Juni 2021

I really liked this course . if someone wants to know how digital circuits are made inside of computer then this course could be proven as turning point in his way of learning .

4. Juni 2020

This is very good course , but i found some little missing details related to reading materials .\n\nBut this was really very helpful course for me as fresher .

Filtern nach:

51 - 75 von 112 Bewertungen für Hardware Description Languages for FPGA Design

von Soorya K

8. Mai 2020

Assignment programs are very challenging.


7. Juli 2020

extremely short crisp and knowledgeable

von Apurba D

9. Aug. 2020

Liked the programming assignments...

von patrick

2. Aug. 2020

good mix between theory and practice

von Ehtesham A K

19. Mai 2020

Excellent Course for FPGA learners.

von Carlos M

8. März 2021

Excellent materials and exercises.

von P S

6. Aug. 2020

Very well explained the concepts.

von Ashish S

1. Okt. 2020

Good Study material for Beginner

von Kondapally M R

24. Juni 2020

very informative and practical

von Abdul A

27. Nov. 2020

Really a great experience!!


31. Aug. 2020

this course is very nice.

von Vinayakumar R B

26. Mai 2020

Very good for beginners

von Ovidiu S

17. Nov. 2020

High Value Course !

von Rinson V

17. Aug. 2020

Very good course

von Mucha. S r

27. Aug. 2020

Awesome course

von Dr. J V S

13. Nov. 2020


von segu v n k

29. Okt. 2020

very good

von Mohsen s

27. März 2021


von Sanjana A R

11. Juli 2021

von Lalit B

4. März 2020

feeling satisfactory after successfully completing the course. the instructors were the expert of the topic and explained very well. some of the programming assignments require more clarifications and learning which i found missing in the videos. videos are not enough to complete those assignments.

i am very happy to have this certification and would love to be the part of more learning by the coursera.

von Samer A A

7. Juli 2020

The course gives a good overview for the HDL. However, the assignments templates needs to be revised because there were some errors. Also, the requirements sometimes are vague, there is no specific specifications like synchronous/asynchronous signals active high/low clock. But, overall it was good time to revise HDL. I am looking forward to be involved in more advanced courses related to the FPGAs.

von Sangeerth P

29. Juni 2020

The course content was worthier and good. But the assignments and the methodology of assessing the assignments were not rigorous. The questions were not clear and elaborate. Once I uploaded a wrong Verilog code but I got 10/10 for that assignment. I don't know how. The course content was really good. But the method of evaluating the assignment could be made better.

von pedram k

21. Apr. 2020

A good combination of introduction to VHDL and Verilog. Cover essential topics for design and test implementation. There are rooms to improvement regarding the assignments description. Also, having the test benches encrypted is fine, but better to make it open source for students once they have get enough grades for that specific problem.


15. Mai 2020

This course provides insights into the world of hardware design. The assignments provided were quite challenging and diverse. The Testbench files were provided on which the code had to be tested and simulation had to be done on ModelSim, provided by MentorGraphics.It was quite an interesting course.

von Borys I

29. Aug. 2020

Good training. Could be better. Students should pay attention that most of information they will learn not from video but from books recommended at the end of video. Practical work has abit cryptic task description. what exactly doing particular wire is not clear. U have to google a lot to find out.